This specification relates to re-timer circuitry for data communications.
When a signal is transmitted from a transmitter to a receiver through an optical, wireless, electrical, or any other types of links, noises such as jitters may be added to the signal during the transmission. The data bit error rate may increase and the performance of the link may suffer as the result. A re-timer may be inserted between the transmitter and the receiver to cancel part of the jittery signal and to release the “cleaned” signal to the receiver, allowing the signal to travel longer and/or to reach the end point with an improved bit error rate. However, when the re-timer is inserted, a word alignment at the receiver may be lost due to a latency associated with the re-timer. For example, in an 8b10b encoding, the word length of each word is 10 bits. If the received signal is delayed by 12 bits after the re-timer insertion, the word will be misaligned at the receiver.
Conventionally, to ensure that words are aligned at the receiver, a word alignment process may start after the re-timer is asserted in the link. The processing of the transmitted data will be delayed until the word alignment process is complete. The end user may thus experience a delay due to the deferral of the world alignment process, which yields a loss in data bandwidth.